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C-MOS 1M (65,536 X 16)-BIT ONE TIME EPROM
-TOP VIEW6 5 4 3 2 VPP 1 NC 44 43 42 41 40 VDD (+5V)
24 25
HN27C1024HCP-10 (1/2) IL00
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 CE 3 OE 22
I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 I/O8 I/O9 I/O10 I/O11 I/O12 I/O13 I/O14 I/O15 PGM 43
21 20 19 18 17 16 15 14 11 10 9 8 7 6 5 4
7 8 9 10 11 12 GND 13 NC 14 15 16 17 NC
39 38 37 36 35 GND 34 NC 33 32 31 30 29
26 27 28 29 30 31 32 35 36 37 38 39 40 41
18 19 20 21 22 23 24 25 26 27 28
(VDD = +5V) PIN NO. 1 2 3 4 5 6 7 8 9 10 11 I/O -- -- I I/O I/O I/O I/O I/O I/O I/O I/O ; ; ; ; ; ; SIGNAL NC VPP CE I/O15 I/O14 I/O13 I/O12 I/O11 I/O10 I/O9 I/O8 PIN NO. 12 13 14 15 16 17 18 19 20 21 22 I/O -- -- I/O I/O I/O I/O I/O I/O I/O I/O I SIGNAL GND NC I/O7 I/O6 I/O5 I/O4 I/O3 I/O2 I/O1 I/O0 OE PIN NO. 23 24 25 26 27 28 29 30 31 32 33 I/O -- I I I I I I I I I -- SIGNAL NC A0 A1 A2 A3 A4 A5 A6 A7 A8 NC PIN NO. 34 35 36 37 38 39 40 41 42 43 44 I/O -- I I I I I I I -- I -- SIGNAL GND A9 A10 A11 A12 A13 A14 A15 NC PGM VDD
A0-A15 CE I/O0-I/O15 OE PGM VPP
ADDRESS INPUTS CHIP ENABLE INPUT DATA INPUTS/OUTPUTS OUTPUT ENABLE INPUT PROGRAM ENABLE INPUT ROGRAM VOLTAGE INPUT
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HN27C1024HCP-10 (2/2)
30 31 32 35 36 37 38 39 40 41
A6 A7 A8 A9 A10 A11 A12 A13 A14 A15
X-DECODER
MEMORY MATRIX 1024 X 1024
I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 I/O8 I/O9 I/O10 I/O11 I/O12 I/O13 I/O14 I/O15
21 20 19 18 17
INPUT DATA CONTROL
16 15 14 11 10 9 8 7 6 5 4
Y-GATING
Y-DECODER
CE OE PGM VDD VPP GND
3 22 43 44 2 12, 34
H
24 A0
25 A1
26 A2
27 A3
28 A4
29 A5
High Threshold Inverter

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